Reese, Robert B.
Morris, Thomas H.
Date of Degree
Graduate Thesis - Open Access
Master of Science
Department of Electrical and Computer Engineering
Asynchronous design is an alternative to the more widely used synchronous design which allows for the elimination of a global clock network and associated design issues such as clock skew. Uncle is a toolflow that provides automated assistance for transforming a synchronous system specified in Verilog RTL to an asynchronous system. With assistance from Uncle an asynchronous delay-insensitive microprocessor is implemented using NULL Convention Logic (NCL) and verified to function properly. An advantage of asynchronous design is that it can be data-driven. Data-driven design allows specific blocks of logic to only be active when they are needed. Data-driven design is implemented to bypass parts of the asynchronous microprocessor. These parts included the ALU and the peripheral hardware multiplier. This resulted in a reduction of total power consumed and an increase in speed. Overall, it was concluded that asynchronous design with Uncle was a viable alternative to synchronous design.
Kalish, William, "Asynchronous Design Investigation for a 16-Bit Microprocessor" (2012). Theses and Dissertations MSU. 804.