Date of Degree
Graduate Thesis - Open Access
Master of Science
College of Engineering
Department of Electrical and Computer Engineering
Creation of semi-insulating layers in SiC is highly desirable for high voltage device fabrication. Specifically PiN diodes can be fabricated with a compensated semi-insulating layer that would be capable of blocking a large reverse voltage. Semi-insulating (SI) behavior in SiC has been traditionally achieved via passivation of shallow dopants with vanadium-related deep levels. Degraded electrical properties of SiC devices result from the use of vanadium compensated SiC because unintentional formation of additional defects due to vanadium segregation and stress generation in the material occur. In this work, the possibility of low doped or SI epilayers via engineering of the boron related defects in SiC is investigated. High temperature treatment (up to 2000°C) of boron doped samples is used to stimulate boron diffusion and formation of deep boron centers in concentration sufficient for compensation of shallow dopants, without simultaneous formation of undesirable shallow boron levels. High temperature annealing of both epitaxial layers in-situ doped with boron and boron implanted 4H-SiC is investigated. The possibility of diffusion from highly boron doped substrate is also investigated. The diffusion profiles are modeled and the diffusion coefficients extracted to give information about diffusion mechanisms. The boron D-center was observed using photoluminescence (PL) after high temperature annealing of the implanted samples. Clear temperature dependence of the creation of the D-center was observed. Compensated material was revealed after an Inductively Coupled Plasma (ICP) etch on an epi-over grown sample.
Das, Hrishikesh, "The Creation of Boron Deep Levels by High Temperature Annealing of 4H-SIC" (2004). Theses and Dissertations MSU. 4300.