Title

The Multiple Gate Mos-Jfet

Advisor

Blalock, Benjamin J.

Committee Member

Casady, Jeffrey B.

Committee Member

Winton, Raymond S.

Committee Member

Reese, Robert B.

Date of Degree

1-1-2002

Document Type

Graduate Thesis - Open Access

Degree Name

Master of Science

College

College of Engineering

Abstract

A new multiple-gate transistor, the SOI MOS-JFET, is presented. This device combines the MOS field effect and junction field effect within one transistor body. Measured I-V characteristics are provided to illustrate typical modes of operation and the functionality associated with each gate. Two-dimensional simulations of the device?s cross-section will be presented to illustrate various conduction modes under different bias conditions. Test results indicate the MOS-JFET is well suited for both high-voltage and low-voltage circuit demands for systems-on-a-chip applications on SOI technology. Analog building-block circuits based the MOS-JFET are also presented.

URI

https://hdl.handle.net/11668/17998

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